1. Field of the Invention
The present invention relates to a liquid crystal display device, and more particularly, to a polycrystalline silicon thin film transistor liquid crystal display device capable of reducing the number of masks used to fabricate a thin film transistor and a fabrication method thereof.
2. Description of the Related Art
In the recent information oriented society, the importance of visual display devices has increased. Requirements for better display devices having low power consumption, reduced thickness, light weight and high picture quality have to be satisfied. Because the characteristics of LCD (liquid crystal display) devices satisfy all those conditions and are suitable for mass-production, various new LCD products have been rapidly developed. LCD devices have become the core technology gradually replacing the conventional CRT (cathode ray tube) devices.
In general, the liquid crystal display devices display a picture by adjusting a light transmittance ratio of liquid crystal cells by respectively supplying a data signal according to picture information to the liquid crystal cells arranged as a matrix form. To accomplish this, the liquid crystal display devices include a color filter substrate, an array substrate, and a liquid crystal material layer formed between the color filter substrate and the array substrate.
A thin film transistor (TFT) is generally used as a switching device for liquid crystal display devices. In addition, an amorphous silicon thin film or a polycrystalline silicon thin film is used as a channel layer of the thin film transistor.
In a fabrication process of the liquid crystal display devices, a great number of mask processes (that is, photolithography processes) are required to fabricate the array substrate that includes the thin film transistor. There is a need to reduce the number of the mask processes.
FIG. 1 is a plan view illustrating a part of the array substrate of a related art liquid crystal display device, in which only one pixel is illustrated for convenience, although it is understood that if N gate lines and M data lines cross each other, then N×M pixels exist in the actual liquid crystal display device.
In FIG. 1, on the array substrate 10, a plurality of gate lines 16 and data lines 17 are arranged lengthwise and breadthwise, respectively, on the substrate 10 to define a plurality of pixel regions. In addition, a thin film transistor is formed at each crossing of a gate line 16 and a data line 17, and a pixel electrode 18 is formed at each pixel region.
The thin film transistor includes a gate electrode 21 connected to the gate line 16, a source electrode 22 connected to the data line 17, and a drain electrode 23 connected to the pixel electrode 18. Also, the thin film transistor includes first and second insulating layers (not illustrated) for insulating the gate electrode 21 and the source and drain electrodes 22 and 23, and an active layer 24 for forming a conductive channel between the source electrode 22 and the drain electrode 23 by a gate voltage supplied to the gate electrode 21.
The source electrode 22 is electrically connected to a source region of the active layer 24 through a first contact hole 40a formed on the insulating layers, and the drain electrode 23 is electrically connected to a drain region of the active layer 24 through the first contact hole 40a. A third insulating layer (not illustrated) provided with a second contact hole 40b is formed on the drain electrode 23, so that the drain electrode 23 and the pixel electrode 18 are electrically connected to each other through the second contact hole 40b. 
Hereinafter, a fabrication process of a general liquid crystal display device will be described in more detail with reference to FIGS. 2A to 2F.
FIGS. 2A to 2F are sectional views taken along line I-I′ of FIG. 1. FIGS. 2A to 2F illustrate a fabrication process of the liquid crystal display device in which the thin film transistor is a polycrystalline silicon thin film transistor using a crystalline silicon as an active layer and the thin film transistor is formed as a coplanar structure in which that the gate electrode, the source electrode, and the drain electrode are positioned on the same plane on the active layer.
In FIG. 2A, an active pattern 24 composed of a polycrystalline silicon layer is formed on the substrate 10 using a photolithography process (hereinafter, “photo process”).
In FIG. 2B, a first insulating layer 15a and a conductive metal layer are deposited in turn on the entire surface of the substrate 10 where the active pattern 24 is formed, and then the conductive metal material is patterned using a photo process, thereby forming a gate electrode 21 on the active pattern 24 with the first insulating layer 15a interposed therebetween.
High concentration impurity ions are injected into a predetermined region of the active pattern 24 using the gate electrode 21 as a mask, thereby forming p+ or n+ type source and drain regions 24a and 24b. The source and drain regions 24a and 24b are formed to be ohmic-contacted with source and drain electrodes which will be later described.
In FIG. 2C, a second insulating layer 15b is deposited on the entire surface of the substrate 10 where the gate electrode 21 is formed, and the second and first insulating layers 15b and 15a are partially removed by a photo process, thereby forming first contact holes 40a that partially expose the source and drain regions 24a and 24b. 
In FIG. 2D, a conductive metal material is deposited on the entire surface of the substrate 10 and a photo process is performed, thereby forming a source electrode 22 connected to the source region 24a and a drain electrode 23 connected to the drain region 24b through the first contact hole 40a. A part of the conductive metal layer constituting the source electrode 22 is extended in one direction thus making a data line 17.
In FIG. 2E, a third insulating layer 15c is deposited on the entire surface of the substrate 10 and a second contact hole 40b that exposes a part of the drain electrode 23 is formed by a photo process.
In FIG. 2F, a transparent conductive material is deposited on the entire surface of the substrate 10 where the third insulating layer 15c is formed, and a pixel electrode 18 connected to the drain electrode 23 through the second contact hole 40b is formed by a photo process.
As noted earlier, to fabricate the liquid crystal display device including the polycrystalline silicon thin film transistor, at least six photo processes are required to pattern elements such as the active pattern, the gate electrode, the first contact hole, the source and drain electrode, the second contact hole, and the pixel electrode.
The photo process is a series of processes for forming a desired pattern by transferring a pattern formed on a mask on a substrate where a thin film is deposited, and includes a plurality of processes such as a photoresist deposition, an exposure to light, a development process, and etc. Accordingly, the photo process lowers the production yield and may introduce defects on the formed thin film transistor.
In addition, because a photo mask designed for forming a pattern is very expensive, the fabrication cost of the liquid crystal display device is increases proportionally when the number of masks used in the process is increased.